1. Field of the Invention
The present invention relates generally to a thin film integrated circuit employing a thin film transistor formed with non-monocrystalline silicon, such as amorphous silicon, polycrystalline silicon or so forth. More specifically, the invention relates to a thin film integrated circuit which has a function of recovering fluctuation of a threshold voltage of a thin film transistor.
2. Description of the Related Art
In the recent years, demand for downsizing of electronic apparatus and devices to be employed in the electronic apparatus has been getting more and more stronger. In an image original reading apparatus, such as facsimile and so forth, contact image sensors have become frequently used. On the other hand, in image display apparatus, liquid crystal display panel and so forth have become frequently used.
A pixel as a unit of reading in the contact image saensor is constituted of an optoelectric conversion element. In such case, if signal processing circuits are provided for each pixel in one-by-one basis, occupied area of the signal processing circuits in the overall device becomes quite large in comparison with the occupied area of the pixel portions to spoil merit of downsizing. Furthermore, necessity of large number of signal processing circuit naturally cause rising of cost. This is true even in the case of the liquid crystal display panel. Particularly, in case of the liquid crystal display panel, a two dimensional display is typically employed to make physically impossinble to construct the device with the signal processing circuits corresponded to the pixels in one-by-one basis.
Therefore, as a solution for this, in case of the contact image sensor, pixel groups are separated into a plurality of blocks, and these blocks are wired in matrix so that image signal is sequentally extracted per block. On the other hand, in the liquid crystal display panel, pixels are separated per each scanning line to form blocks, and these blocks are wired in matrix to sequentially write in image display signal to respective pixels per block.
Furthermore, recently, as a system for sequentially selecting switching elements constituted of thin film transistor and provided for each pixel, there has been proposed to form the switching elements and a shift register circuit on a common substrate by constructing a shift register with thin film transistors in place of an individual IC.
As the shift register circuit of this system, a circuit shown in FIG. 1 has been known conventionally. The operation of the circuit of FIG. 1 is illustrated in FIG. 2. To drain electrodes of thin film transistors Tr.sub.12 and Tr.sub.32, a clock .PHI..sub.1 is applied, and to drain electrodes of thin film transistors Tr.sub.22 and Tr.sub.42, a clock .PHI..sub.2 having opposite phase to the clock .PHI..sub.1 is applied. When a HIGH level (hereinafter referred to as H level) start pulse D is applied to a gate electrode of a transistor Tr.sub.11, the transistor Tr.sub.11 turns ON to charge a node A.sub.1 up to a power source voltage V.sub.DD. The node A.sub.1 forms a capacitor with a gate-drain electrode capacity and a gate-source electrode capacity of the transistor Tr.sub.12 and a gate-drain electrode capacity of a transistor Tr.sub.13. Then, the start pulse D drops to be LOW level (hereinafter referred to as L level), the transistor Tr.sub.11 turns OFF to hold a charge at the node A.sub.1.
Next, when the clock .PHI..sub.1 is risen to be H level, the potential at the node A.sub.1 is pulled up beyond the power source voltage V.sub.DD by a boot strap effect. In conjunction therewith, an output Q.sub.1 of the driving transistor Tr.sub.12 becomes H level to drive a load Z.sub.1. Then, when the clock .PHI..sub.1 falls to L level, the output Q.sub.1 falls to be L level. Subsequently, an output Q.sub.2 is risen to be H level. Thus, the gate electrode of a resetting transistor Tr.sub.13 is turned into H level to turn the transistor Tr.sub.13 ON. As a result, the potential at the node A.sub.1 is reset to the ground level to turn OFF the transistor Tr.sub.12. In the manner set forth above, the output Q is shifted sequentially.
Since the foregoing example employs the boot strap effect, a voltage higher than the power source voltage V.sub.DD can be applied to the gate electrode of the thin film transistor Tr.sub.12. As a result, sufficient ON current can be advantageously taken out from the driving transistor. On the other hand, since there is no passing through current flowing directly from the driving transistor to the grounding potential, a shift register with low power consumption can be realized.
However, since a period to maintaining the node A.sub.1 is electrically floating condition is long, the potential at the node A.sub.1 may unstably fluctuate by external noise and so forth to easily cause malfunction in the register circuit. For example, in case of the example of FIG. 2, the potential of the node A.sub.1 is fixed only when the start pulse D or the output Q.sub.2 is high level. Accordingly, in order to avoid malfunction, the potential at the node A.sub.1 is to be fixed at L level except for the period where the potential at the node A.sub.1 is H level. This can be achieved by applying H level voltage to the gate electrode of the resetting transistor Tr.sub.13 of FIG. 1.
In the meanwhile, an amorphous thin film transistor and a polycrystalline thin film transistor have defect at the interface between a gate insulation layer and a semiconductor layer and within the layer, fluctuation of threshold voltage can be easily caused. Namely, when gate-source voltage is applied to the thin film transistor, a threshold voltage may fluctuate into positive if the applied voltage is positive. Conversely, if the gate-source voltage is negative, the threshold voltage is fluctuate into positive. It has been known that the fluctuation amount is generally proportional to applied gate-source voltage value and a charge period. Fluctuation of the threshold voltage can be improved in certain extent by reducing defects at the interface and layer. In those transistors set forth above which are not a single crystalline transistor, it is currently impossible to ultimately eliminate fluctuation of threshold voltage.
As set forth above, applying the positive (H level) voltage between the gate and the source electrode for a long period causes fluctuation of the threshold voltage of the resetting transistor Tr.sub.13 into positive. Therefore, if the gate-source voltage to turning ON the transistor Tr.sub.13 is constant, the ON current of the thin film transistor can be lowered. Accordingly, the transistor Tr.sub.13 cannot be reset sufficiently, to lead malfunction of the shift register circuit.
As a measure for the problem in the case where a transistor having fluctuation of the threshold voltage is employed, there is a known technology disclosed in Japanese Unexamined Patent Publication (Kokai) No. Heisei 5-267636, for example. FIG. 3 is a circuit diagram shown in the publication. In FIG. 3, transistors Tr.sub.3 and Tr.sub.4 are transistors for resetting a node AA, in which fluctuation of the threshold voltage is reduced by reducing charge period of the gate-source voltage for respective transistors by charging the positive gate-source voltage to these transistors in time series. On the other hand, utilizing boot strap effect in a gate electrode portion of the transistor Tr.sub.12, a large ON current of the driving transistor can be certainly maintained by applying higher voltage than the power source voltage V.sub.DD to the gate electrode portion of the driving transistor Tr.sub.12. Furthermore, by boot strap effect via a capacitor C.sub.B, even when the threshold voltages of the resetting transistors Tr.sub.3 and Tr.sub.4 are fluctuate in the positive direction, resetting performance can be enhanced by assuring certain extent of ON current.
However, in the prior art disclosed in the above-mentioned publication, the following problem is encountered. Namely, in the circuit disclosed Japanese Unexamined Patent Publication No. Heisei 5-267636, even when a plurality of resetting transistors are employed, it is not possible to completely prevent fluctuation of the threshold voltage as long as the positive gate-source voltage is applied. Furthermore, while the gate-source voltage of the resetting transistors is boosted utilizing boot strap effect of the capacitor C.sub.B, it is not possible to expand the operation life of the shift register, because the positive fluctuation of the threshold voltage is caused to be increased.
On the other hand, a system for charging negative voltage between the gate and source for returning the threshold voltage fluctuated into positive to an initial level, has been disclosed in Japanese Unexamined Patent Publication No. Heisei 5-30278. FIG. 4 shows a circuit diagram shown in the above-identified publication. To a voltage terminal V.sub.C1, a negative voltage is set. A resistor R.sub.11 is set at sufficiently larger resistance value than a load resistance of an inverter constructed by transistors Tr.sub.12 and Tr.sub.13. Namely, the transistor Tr.sub.12 is a load transistor. In the publication, there is a statement that the resistance value of the load transistor is preferably greater than the ON resistance of the driving transistor Tr.sub.13 in the extent of more than or equal to six times of ON resistance. When the output of the inverter turns into LOW level and a pass transistor Tr.sub.11 is turned OFF, the negative voltage is charged to the gate electrode via a resistor R.sub.11. By this, the threshold voltage fluctuated into positive is returned to the normal level.
However, in the circuit disclosed in Japanese Unexamined Patent Publication No. Heisei 5-30278, since the circuit construction is an inverter system, a problem that a through current of the circuit is present to cause large power consumption, is encountered. On the other hand, in the light of the field of products of the present invention, the load to be driven by the shift register is a matrix wiring and sensor elements or switching elements of thin film transistor connected to the matrix wiring. Therefore, the electric property of the load to be driven can be regarded as a distributed constant circuit of resistance and capacity. The resistance is the resistance of the conductor of the matrix wiring, and the capacity is a capacity of the matrix wiring conductor and a parasitic capacitor of sensor elements or switch elements. The resistance can be significantly reduced by forming the wiring conductor of a material having small electric resistance, e.g. aluminum and so forth. However, it is currently not possible to realize significant reduction of production process of the capacitor.
Accordingly, considering the external load of the inverter of FIG. 4, a time constant when the output is varied from L level to H level is determined by a resistance value and a load capacity of the transistor Tr.sub.12. Also, a time constant when the output is varied from H level to L level is determined by an ON resistance and a load capacity of the transistor Tr.sub.13. Accordingly, in the desired circuit constant setting condition, the time constant when the output varies from L level to H level becomes six times greater than the time constant when the output is varied from H level to L level to make rising and falling of the output pulse configuration asymmetric. Therefore, when a size of the transistor Tr.sub.12 is determined to have a desired time constant of the rising period, the element size of the transistor Tr.sub.13 becomes significantly large to make downsizing of the device difficult for large occupying area of the shift register circuit. Furthermore, since the element parasitic capacity becomes larger at greater element size, a time constant upon application of load voltage due to the resistance R.sub.11 becomes long to make it impossible to obtain sufficient recovery effect of fluctuation of threshold voltage.